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echo "Compiling Core Verilog UNISIM/Behavioral model"
vlogcomp -work work ..\\..\\implement\\results\\routed.v

echo "Compiling Test Bench Files"
vhpcomp -work work ..\\fifo_4k_2clk_pkg.vhd
vhpcomp -work work ..\\fifo_4k_2clk_rng.vhd 
vhpcomp -work work ..\\fifo_4k_2clk_dgen.vhd
vhpcomp -work work ..\\fifo_4k_2clk_dverif.vhd
vhpcomp -work work ..\\fifo_4k_2clk_pctrl.vhd 
vhpcomp -work work ..\\fifo_4k_2clk_synth.vhd 
vhpcomp -work work ..\\fifo_4k_2clk_tb.vhd

fuse work.fifo_4k_2clk_tb work.glbl -L simprims_ver -o fifo_4k_2clk_tb.exe

.\\fifo_4k_2clk_tb.exe -sdfmax /fifo_4k_2clk_tb/fifo_4k_2clk_synth_inst/fifo_4k_2clk_inst=..\\..\\implement\\results\\routed.sdf -gui -tclbatch .\\wave_isim.tcl
